COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
14.8K
14,893
|
104 | 12 |
18.5M
18,586,464
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
4
|
3
|
12
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
6
|
4
|
24
|
| Half Adder |
6
|
3
|
18
|
| Full Adder |
13
|
6
|
78
|
| Bit inverter |
4
|
3
|
12
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
120
|
48
|
5,760
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
15
|
5
|
75
|
| Signed Negator |
128
|
49
|
6,272
|
| Saving Bytes |
120
|
5
|
600
|
| Counter |
273
|
55
|
15.0K
15,015
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
556
|
6
|
3,336
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
572
|
98
|
56.0K
56,056
|
| Conditions |
78
|
7
|
546
|
| Punchcard Programming |
14.8K
14,893
|
104
|
1.54M
1,548,872
|
| Assembly Programming |
14.8K
14,893
|
104
|
1.54M
1,548,872
|
