COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
14.6K
14,609
|
50 | 9 |
6.57M
6,574,050
|
| Mod 4 |
14.6K
14,609
|
50 | 5 |
3.65M
3,652,250
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
|
20
|
1,760
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
9
|
6
|
54
|
| Signed Negator |
96
|
21
|
2,016
|
| Saving Bytes |
73
|
6
|
438
|
| Counter |
162
|
26
|
4,212
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
8
|
4
|
32
|
| 3 Bit Decoder |
73
|
4
|
292
|
| Little Box |
372
|
7
|
2,604
|
| Arithmetic Logic Unit (ALU) 1 |
116
|
4
|
464
|
| Arithmetic Logic Unit (ALU) 2 |
489
|
42
|
20.5K
20,538
|
| Conditions |
102
|
7
|
714
|
| Punchcard Programming |
14.6K
14,609
|
50
|
730K
730,450
|
| Assembly Programming |
14.6K
14,609
|
50
|
730K
730,450
|
