ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.6K
14,663
|
67 |
25.0K
25,000
|
1.00 |
24.5B
24,560,525,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Nim |
1.82B
1,828,739,312
|
116 | 23 |
4.87T
4,879,076,484,416
|
| Random Number Generator |
1.82B
1,828,739,312
|
116 | 584 |
123T
123,886,115,952,128
|
| Delicious order |
1.82B
1,828,739,312
|
116 | 2,663 |
564T
564,912,203,391,296
|
| Capitalize |
1.82B
1,828,739,312
|
116 | 687 |
145T
145,735,893,251,904
|
| Tower of Hanoi |
1.82B
1,828,739,615
|
116 | 1,079 |
228T
228,892,365,171,860
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| XOR Gate |
3
|
2
|
6
|
| XNOR Gate |
4
|
3
|
12
|
| Full Adder |
9
|
4
|
36
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
191
|
32
17
|
2,304
3,247
|
| Signed Negator |
80
199
|
33
18
|
2,640
3,582
|
| Conditions |
13
|
9
|
117
|
| Equality |
39
|
7
|
273
|
| Unsigned Less |
200
|
19
|
3,800
|
| Objective Beauty |
31
|
9
|
279
|
| Divide |
3,540
4,492
|
296
262
|
1.04M
1,047,840
1.17M
1,176,904
|
| Modulo |
3,540
|
296
|
1.04M
1,047,840
|
| Multiply |
870
1,703
|
253
148
|
220K
220,110
252K
252,044
|
