ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.2K
14,214
|
57 |
25.0K
25,000
|
1.00 |
20.2B
20,254,950,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.2K
14,214
|
57 | 12 |
9.72M
9,722,376
|
| Mod 4 |
14.2K
14,214
|
57 | 5 |
4.05M
4,050,990
|
| Code Breaker |
14.2K
14,214
|
57 | 72 |
58.3M
58,334,256
|
| The Maze |
14.2K
14,214
|
57 | 1,555 |
1.25B
1,259,857,890
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
102
|
32
12
|
2,304
1,224
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
30
|
5
|
150
|
| Counter |
104
|
11
|
1,144
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 3 Bit Decoder |
54
|
5
|
270
|
| Little Box |
404
|
6
|
2,424
|
| Arithmetic Logic Unit (ALU) 1 |
100
|
3
|
300
|
| Arithmetic Logic Unit (ALU) 2 |
299
|
41
|
12.2K
12,259
|
| Conditions |
31
|
7
|
217
|
| Punchcard Programming |
14.2K
14,214
|
57
|
810K
810,198
|
| Assembly Programming |
14.2K
14,214
|
57
|
810K
810,198
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
31
|
5
|
155
|
| Unsigned Less |
64
|
11
|
704
|
| Signed Less |
69
|
13
|
897
|
| LSR |
99
|
6
|
594
|
| Count leading zeroes |
30
|
5
|
150
|
| ASR |
99
|
6
|
594
|
| One-hot Encoding |
99
|
6
|
594
|
| Comparison Flags |
717
|
52
|
37.2K
37,284
|
| Symphony ALU |
4,368
4,608
|
132
55
|
576K
576,576
253K
253,440
|
| Condition Match |
8
|
5
|
40
|
| Objective Beauty |
31
|
5
|
155
|
| Divide |
3,644
|
691
|
2.51M
2,518,004
|
| Modulo |
3,644
|
695
|
2.53M
2,532,580
|
| Multiply |
632
|
97
|
61.3K
61,304
|
