COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
14.5K
14,535
|
104 | 69 |
104M
104,303,160
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
4
|
3
|
12
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
5
|
4
|
20
|
| Half Adder |
5
|
3
|
15
|
| Full Adder |
11
|
6
|
66
|
| Bit inverter |
5
|
3
|
15
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
|
48
|
4,224
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
96
|
49
|
4,704
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
204
|
55
|
11.2K
11,220
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
45
|
4
|
180
|
| Little Box |
406
|
6
|
2,436
|
| Arithmetic Logic Unit (ALU) 1 |
100
|
3
|
300
|
| Arithmetic Logic Unit (ALU) 2 |
445
|
98
|
43.6K
43,610
|
| Conditions |
72
|
7
|
504
|
| Punchcard Programming |
14.5K
14,535
|
112
|
1.62M
1,627,920
|
| Assembly Programming |
14.5K
14,535
|
112
|
1.62M
1,627,920
|
