ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.4K
14,497
|
71 |
25.0K
25,000
|
1.00 |
25.7B
25,732,175,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.4K
14,472
|
104 | 9 |
13.5M
13,545,792
|
| Mod 4 |
14.4K
14,472
|
104 | 5 |
7.52M
7,525,440
|
| Code Breaker |
14.4K
14,488
|
104 | 207 |
311M
311,897,664
|
| The Maze |
14.4K
14,488
|
104 | 2,501 |
3.76B
3,768,386,752
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
5
|
3
|
15
|
| Half Adder |
6
|
3
|
18
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
5
|
3
|
15
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
|
32
|
2,304
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
112
|
49
|
5,488
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
177
|
54
|
9,558
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
37
|
4
|
148
|
| Little Box |
442
|
7
|
3,094
|
| Arithmetic Logic Unit (ALU) 1 |
100
|
3
|
300
|
| Arithmetic Logic Unit (ALU) 2 |
485
|
98
|
47.5K
47,530
|
| Conditions |
64
|
8
|
512
|
| Punchcard Programming |
14.4K
14,472
|
104
|
1.50M
1,505,088
|
| Assembly Programming |
14.4K
14,472
|
104
|
1.50M
1,505,088
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
32
|
7
|
224
|
| Unsigned Less |
81
|
34
|
2,754
|
| Signed Less |
88
|
35
|
3,080
|
| LSR |
181
|
5
|
905
|
| Count leading zeroes |
165
|
22
|
3,630
|
| ASR |
181
|
5
|
905
|
| One-hot Encoding |
181
|
5
|
905
|
| Comparison Flags |
1,161
|
204
|
236K
236,844
|
| Symphony ALU |
6,109
|
141
|
861K
861,369
|
| Condition Match |
20
|
11
|
220
|
| Objective Beauty |
31
|
9
|
279
|
| Divide |
5,822
|
834
|
4.85M
4,855,548
|
| Modulo |
5,822
|
836
|
4.86M
4,867,192
|
| Multiply |
2,259
|
355
|
801K
801,945
|
