ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.3K
14,339
|
119 |
25.0K
25,000
|
1.00 |
42.6B
42,658,525,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.2K
14,275
|
119 | 9 |
15.2M
15,288,525
|
| Mod 4 |
14.2K
14,275
|
119 | 5 |
8.49M
8,493,625
|
| Code Breaker |
14.2K
14,275
|
119 | 1,280 |
2.17B
2,174,368,000
|
| The Maze |
14.2K
14,275
|
119 | 3,496 |
5.93B
5,938,742,600
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
6
|
4
|
24
|
| Half Adder |
5
|
3
|
15
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
4
|
3
|
12
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
|
32
|
2,304
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
80
|
33
|
2,640
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
145
|
38
|
5,510
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
420
|
6
|
2,520
|
| Arithmetic Logic Unit (ALU) 1 |
106
|
7
|
742
|
| Arithmetic Logic Unit (ALU) 2 |
326
|
68
|
22.1K
22,168
|
| Conditions |
13
|
9
|
117
|
| Punchcard Programming |
14.2K
14,275
|
119
|
1.69M
1,698,725
|
| Assembly Programming |
14.2K
14,275
|
119
|
1.69M
1,698,725
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
31
|
7
|
217
|
| Unsigned Less |
80
|
33
|
2,640
|
| Signed Less |
80
|
33
|
2,640
|
| LSR |
156
|
5
|
780
|
| Count leading zeroes |
166
|
9
|
1,494
|
| ASR |
156
|
5
|
780
|
| One-hot Encoding |
156
|
5
|
780
|
| Comparison Flags |
837
|
132
|
110K
110,484
|
| Symphony ALU |
5,328
|
135
|
719K
719,280
|
| Condition Match |
37
|
5
|
185
|
| Objective Beauty |
28
|
8
|
224
|
| Divide |
1,248
|
385
|
480K
480,480
|
| Modulo |
1,184
|
385
|
455K
455,840
|
| Multiply |
632
|
225
|
142K
142,200
|
