ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.4K
14,420
|
88 |
25.0K
25,000
|
1.00 |
31.7B
31,724,000,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.4K
14,484
|
104 | 9 |
13.5M
13,557,024
|
| Mod 4 |
14.4K
14,484
|
104 | 5 |
7.53M
7,531,680
|
| Code Breaker |
14.4K
14,484
|
104 | 1,278 |
1.92B
1,925,097,408
|
| The Maze |
14.4K
14,484
|
104 | 1,673 |
2.52B
2,520,100,128
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| XOR Gate |
3
|
2
|
6
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
5
|
3
|
15
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
162
|
32
17
|
2,304
2,754
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
112
|
49
|
5,488
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
177
|
54
|
9,558
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
396
|
6
|
2,376
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
356
|
34
|
12.1K
12,104
|
| Conditions |
55
|
7
|
385
|
| Punchcard Programming |
14.4K
14,484
|
104
|
1.50M
1,506,336
|
| Assembly Programming |
14.4K
14,484
|
104
|
1.50M
1,506,336
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
40
|
3
|
120
|
| Equality |
39
|
7
|
273
|
| Unsigned Less |
64
|
13
|
832
|
| Signed Less |
72
|
15
|
1,080
|
| LSR |
156
|
5
|
780
|
| Count leading zeroes |
847
|
385
|
326K
326,095
|
| ASR |
156
|
5
|
780
|
| One-hot Encoding |
156
|
5
|
780
|
| Comparison Flags |
1,187
|
204
|
242K
242,148
|
| Symphony ALU |
5,667
|
130
|
736K
736,710
|
| Condition Match |
15
|
6
|
90
|
| Objective Beauty |
29
|
8
|
232
|
| Divide |
1,232
|
401
|
494K
494,032
|
| Modulo |
1,232
|
403
|
496K
496,496
|
| Multiply |
1,948
|
342
|
666K
666,216
|
