ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.5K
14,515
|
69 |
25.0K
25,000
|
1.00 |
25.0B
25,038,375,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.4K
14,461
|
97 | 12 |
16.8M
16,832,604
|
| Mod 4 |
14.6K
14,637
|
89 | 5 |
6.51M
6,513,465
|
| Code Breaker |
14.6K
14,637
|
89 | 2,302 |
2.99B
2,998,799,286
|
| The Maze |
14.6K
14,637
|
89 | 2,398 |
3.12B
3,123,857,814
|
| Nim |
1.82B
1,828,736,131
|
59 | 14 |
1.51T
1,510,536,044,206
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger AND Gate |
2
|
2
|
4
|
| Full Adder |
9
|
4
|
36
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
64
|
32
|
2,048
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
38
|
6
|
228
|
| Signed Negator |
107
|
8
|
856
|
| Saving Bytes |
80
|
6
|
480
|
| Counter |
137
172
|
38
13
|
5,206
2,236
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
412
|
8
|
3,296
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
476
755
|
90
86
|
42.8K
42,840
64.9K
64,930
|
| Conditions |
14
|
6
|
84
|
| Punchcard Programming |
14.4K
14,461
|
97
|
1.40M
1,402,717
|
| Assembly Programming |
14.4K
14,461
14.6K
14,637
|
97
89
|
1.40M
1,402,717
1.30M
1,302,693
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
32
|
6
|
192
|
| Unsigned Less |
73
|
34
|
2,482
|
| Signed Less |
72
|
35
|
2,520
|
| LSR |
99
|
6
|
594
|
| Count leading zeroes |
264
|
16
|
4,224
|
| ASR |
99
|
6
|
594
|
| One-hot Encoding |
150
|
12
|
1,800
|
| Comparison Flags |
308
|
7
|
2,156
|
| Symphony ALU |
4,071
|
30
|
122K
122,130
|
| Condition Match |
8
|
5
|
40
|
| Objective Beauty |
28
|
8
|
224
|
