ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.5K
14,502
|
40 |
25.0K
25,000
|
1.00 |
14.5B
14,502,000,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.7K
14,781
|
105 | 16 |
24.8M
24,832,080
|
| Mod 4 |
14.7K
14,781
|
105 | 5 |
7.76M
7,760,025
|
| Code Breaker |
14.7K
14,797
|
105 | 137 |
212M
212,854,845
|
| The Maze |
14.7K
14,797
|
105 | 1,913 |
2.97B
2,972,199,405
|
| Nim |
1.82B
1,828,739,253
|
190 | 38 |
13.2T
13,203,497,406,660
|
| Random Number Generator |
1.82B
1,828,739,253
|
190 | 584 |
202T
202,916,907,512,880
|
| Capitalize |
1.82B
1,828,739,253
|
190 | 1,064 |
369T
369,697,927,386,480
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| XOR Gate |
3
|
2
|
6
|
| Full Adder |
11
|
4
|
44
|
| Adding Bytes |
88
|
17
|
1,496
|
| Saving Gracefully |
11
|
6
|
66
|
| Signed Negator |
36
|
9
|
324
|
| Counter |
157
|
16
|
2,512
|
| Conditions |
100
|
13
|
1,300
|
| Punchcard Programming |
14.7K
14,781
|
105
|
1.55M
1,552,005
|
| Assembly Programming |
14.7K
14,781
|
105
|
1.55M
1,552,005
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
40
|
3
|
120
|
| Equality |
55
|
9
|
495
|
| Unsigned Less |
64
67
|
11
9
|
704
603
|
| Signed Less |
277
280
281
|
26
24
23
|
7,202
6,720
6,463
|
| LSR |
152
|
7
|
1,064
|
| Count leading zeroes |
34
36
|
13
12
|
442
432
|
| ASR |
152
|
7
|
1,064
|
| One-hot Encoding |
152
|
7
|
1,064
|
| Comparison Flags |
1,760
|
96
|
168K
168,960
|
| Symphony ALU |
7,156
|
102
|
729K
729,912
|
| Condition Match |
10
|
6
|
60
|
| Objective Beauty |
28
|
8
|
224
|
| Divide |
8,849
|
288
|
2.54M
2,548,512
|
| Modulo |
8,611
|
291
|
2.50M
2,505,801
|
| Multiply |
1,467
|
168
|
246K
246,456
|
