ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture | 1,529 | 181 |
25.0K
25,000
|
1.00 |
6.91B
6,918,725,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.2K
14,200
|
85 | 12 |
14.4M
14,484,000
|
| Mod 4 |
14.2K
14,200
|
85 | 5 |
6.03M
6,035,000
|
| Code Breaker |
14.2K
14,200
|
85 | 909 |
1.09B
1,097,163,000
|
| The Maze |
14.2K
14,200
|
85 | 2,288 |
2.76B
2,761,616,000
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
3
|
2
|
6
|
| Full Adder |
7
|
4
|
28
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
56
|
32
|
1,792
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
9
10
|
6
5
|
54
50
|
| Signed Negator |
32
|
10
|
320
|
| Saving Bytes |
65
73
|
6
5
|
390
365
|
| Counter |
97
|
14
|
1,358
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
4
|
2
|
8
|
| 3 Bit Decoder |
22
|
3
|
66
|
| Little Box |
400
432
|
7
6
|
2,800
2,592
|
| Arithmetic Logic Unit (ALU) 1 |
100
|
3
|
300
|
| Arithmetic Logic Unit (ALU) 2 |
232
|
38
|
8,816
|
| Conditions |
49
|
6
|
294
|
| Punchcard Programming |
14.1K
14,176
|
85
|
1.20M
1,204,960
|
| Assembly Programming |
14.1K
14,176
|
85
|
1.20M
1,204,960
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
31
|
5
|
155
|
| Unsigned Less |
52
|
12
|
624
|
| Signed Less |
57
|
13
|
741
|
| LSR |
94
|
4
|
376
|
| ASR |
150
|
4
|
600
|
| One-hot Encoding |
94
|
4
|
376
|
| Comparison Flags |
611
|
52
|
31.7K
31,772
|
| Symphony ALU |
4,160
|
134
|
557K
557,440
|
| Condition Match |
11
|
5
|
55
|
| Objective Beauty |
24
|
9
|
216
|
