ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture | 1,913 | 39 |
31.2K
31,293
|
0.79 |
2.33B
2,334,676,851
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Nim |
953K
953,943
|
103 | 20 |
1.96B
1,965,122,580
|
| Random Number Generator |
953K
953,943
|
103 | 520 |
51.0B
51,093,187,080
|
| Delicious order |
953K
953,943
|
103 | 1,215 |
119B
119,381,196,735
|
| Capitalize |
953K
953,943
|
103 | 1,543 |
151B
151,609,207,047
|
| Tower of Hanoi |
953K
953,943
|
103 | 1,449 |
142B
142,373,130,921
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Full Adder |
11
|
4
|
44
|
| Bit Inverter |
3
|
2
|
6
|
| Adding Bytes |
88
116
|
24
17
|
2,112
1,972
|
| Signed Negator |
36
|
9
|
324
|
| Counter |
141
|
14
|
1,974
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
18
|
4
|
72
|
| Arithmetic Logic Unit (ALU) 2 |
321
|
37
|
11.8K
11,877
|
| Conditions |
13
|
7
|
91
|
| Unsigned Less |
49
|
26
|
1,274
|
| Signed Less |
55
|
28
|
1,540
|
| Comparison Flags |
326
|
100
|
32.6K
32,600
|
| Symphony ALU |
4,462
4,590
4,653
|
108
105
76
|
481K
481,896
481K
481,950
353K
353,628
|
| Condition Match |
8
|
5
|
40
|
| Objective Beauty |
29
|
8
|
232
|
| Divide |
1,864
|
529
|
986K
986,056
|
| Modulo |
1,800
|
529
|
952K
952,200
|
| Multiply |
632
|
225
|
142K
142,200
|
