ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.6K
14,674
|
72 |
25.0K
25,000
|
1.00 |
26.4B
26,413,200,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| The Maze |
14.7K
14,770
|
72 | 2,446 |
2.60B
2,601,174,240
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
11
|
4
|
44
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
|
32
|
2,816
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
96
|
33
|
3,168
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
201
|
38
|
7,638
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
444
|
10
|
4,440
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
428
|
66
|
28.2K
28,248
|
| Conditions |
70
|
7
|
490
|
| Equality |
39
|
6
|
234
|
| LSR |
189
|
7
|
1,323
|
| ASR |
427
|
11
|
4,697
|
| One-hot Encoding |
189
|
7
|
1,323
|
| Comparison Flags |
1,641
|
140
|
229K
229,740
|
| Symphony ALU |
8,241
|
141
|
1.16M
1,161,981
|
| Condition Match |
11
|
5
|
55
|
| Objective Beauty |
31
|
9
|
279
|
| Divide |
11.6K
11,624
|
891
|
10.3M
10,356,984
|
| Modulo |
12.6K
12,671
|
1,195
|
15.1M
15,141,845
|
| Multiply |
863
|
239
|
206K
206,257
|
