ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture | 2,017 | 153 |
25.0K
25,000
|
1.00 |
7.71B
7,715,025,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Mod 4 |
14.7K
14,749
|
69 | 5 |
5.08M
5,088,405
|
| Code Breaker |
14.7K
14,749
|
69 | 1,062 |
1.08B
1,080,777,222
|
| The Maze |
14.7K
14,749
|
69 | 1,673 |
1.70B
1,702,580,313
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
142
|
32
16
|
2,304
2,272
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
80
|
33
|
2,640
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
104
|
15
|
1,560
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
39
|
8
|
312
|
| Unsigned Less |
95
|
19
|
1,805
|
| Signed Less |
101
|
21
|
2,121
|
| LSR |
148
|
4
|
592
|
| Count leading zeroes |
647
|
233
|
150K
150,751
|
| ASR |
148
|
4
|
592
|
| One-hot Encoding |
148
|
4
|
592
|
| Comparison Flags |
1,028
|
84
|
86.3K
86,352
|
| Symphony ALU |
5,953
6,169
|
261
229
|
1.55M
1,553,733
1.41M
1,412,701
|
| Condition Match |
8
|
5
|
40
|
| Objective Beauty |
31
|
9
|
279
|
| Divide |
50.6K
50,686
|
2,479
|
125M
125,650,594
|
| Modulo |
52.9K
52,926
|
2,792
|
147M
147,769,392
|
| Multiply |
2,052
|
256
|
525K
525,312
|
