ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.5K
14,519
|
44 |
25.0K
25,000
|
1.00 |
15.9B
15,970,900,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.5K
14,547
|
44 | 12 |
7.68M
7,680,816
|
| Code Breaker |
14.5K
14,547
|
44 | 1,024 |
655M
655,429,632
|
| The Maze |
14.6K
14,659
|
76 | 1,070 |
1.19B
1,192,069,880
|
| Nim |
14.5K
14,519
|
44 | 12 |
7.66M
7,666,032
|
| Random Number Generator |
1.82B
1,828,743,565
|
155 | 1,040 |
294T
294,793,462,678,000
|
| Capitalize |
1.82B
1,828,743,565
|
155 | 579 |
164T
164,120,591,240,925
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
3
|
2
|
6
|
| Bigger AND Gate |
3
|
2
|
6
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Adding Bytes |
80
|
17
|
1,360
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
60
|
9
|
540
|
| Counter |
194
|
24
|
4,656
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
34
|
3
|
102
|
| Little Box |
396
|
6
|
2,376
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
430
|
27
|
11.6K
11,610
|
| Conditions |
84
|
8
|
672
|
| Punchcard Programming |
14.5K
14,547
|
44
|
640K
640,068
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
40
96
|
3
2
|
120
192
|
| Equality |
42
|
7
|
294
|
| Unsigned Less |
151
|
27
|
4,077
|
| Signed Less |
163
|
28
|
4,564
|
| LSR |
185
|
8
|
1,480
|
| Count leading zeroes |
155
|
5
|
775
|
| ASR |
185
|
8
|
1,480
|
| One-hot Encoding |
185
|
8
|
1,480
|
| Comparison Flags |
1,553
|
112
|
173K
173,936
|
| Symphony ALU |
7,583
|
113
|
856K
856,879
|
| Condition Match |
12
|
5
|
60
|
| Objective Beauty |
28
|
8
|
224
|
| Divide |
15.0K
15,046
|
387
|
5.82M
5,822,802
|
| Modulo |
17.2K
17,200
|
407
|
7.00M
7,000,400
|
| Multiply |
1,983
|
60
|
118K
118,980
|
