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MorgenRunas ArunShternas
COMPLETE 97%

ARCHITECTURE LEVELS

LEVEL GATE DELAY CYCLE
IPC Instructions per cycle
ENERGY
Overture
14.3K 14,301
38
25.0K 25,000
1.00
13.5B 13,585,950,000

PROGRAMMING LEVELS

LEVEL GATE DELAY CYCLE ENERGY
Circumference
14.3K 14,301
38 16
8.69M 8,695,008
Mod 4
14.3K 14,301
38 5
2.71M 2,717,190
Code Breaker
14.3K 14,301
38 2,076
1.12B 1,128,177,288
The Maze
14.3K 14,301
38 1,727
938M 938,517,426
Nim
14.3K 14,301
38 31
16.8M 16,846,578
Random Number Generator
29.9M 29,958,012
86 584
1.50T 1,504,611,194,688
Delicious order
29.9M 29,958,012
86 1,410
3.63T 3,632,708,535,120
Capitalize
29.9M 29,958,012
86 907
2.33T 2,336,784,852,024
Tower of Hanoi
29.9M 29,958,012
86 1,724
4.44T 4,441,694,691,168

COMPONENT LEVELS

LEVEL GATE DELAY ENERGY
NOT Gate
1
1
1
XOR Gate
3
2
6
Bigger OR Gate
2
2
4
Bigger AND Gate
2
2
4
XNOR Gate
4
3
12
Half Adder
4
2
8
Full Adder
9
4
36
Bit Inverter
3
2
6
Byte NOT
8
1
8
Byte NAND
8
1
8
Adding Bytes
72
91
32
14
2,304
1,274
Multiplexer
33
2
66
Saving Gracefully
10
5
50
Signed Negator
39
10
390
Saving Bytes
80
5
400
Counter
104
11
1,144
1 Bit Decoder
1
1
1
2 Bit Decoder
4
2
8
3 Bit Decoder
26
4
104
Little Box
396
6
2,376
Arithmetic Logic Unit (ALU) 1
276
7
1,932
Arithmetic Logic Unit (ALU) 2
546
39
21.2K 21,294
Conditions
13
9
117
Punchcard Programming
14.2K 14,263
14.3K 14,301
40
38
570K 570,520
543K 543,438
Assembly Programming
14.3K 14,301
38
543K 543,438
Byte Constant
0
0
0
Byte XOR
24
2
48
Equality
31
6
186
Unsigned Less
63
8
504
Signed Less
101
10
1,010
LSR
99
6
594
Count leading zeroes
264
16
4,224
ASR
99
6
594
One-hot Encoding
99
6
594
Comparison Flags
854
40
34.1K 34,160
Symphony ALU
4,663
4,767
130
58
606K 606,190
276K 276,486
Condition Match
18
10
180
Objective Beauty
31
9
279
Multiply
632
225
142K 142,200