ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.4K
14,490
|
55 |
25.0K
25,000
|
1.00 |
19.9B
19,923,750,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.3K
14,353
|
120 | 13 |
22.3M
22,390,680
|
| Delicious order |
1.82B
1,828,739,713
|
161 | 1,527 |
449T
449,590,172,221,911
|
| Capitalize |
1.82B
1,828,739,713
|
161 | 713 |
209T
209,926,517,874,409
|
| Tower of Hanoi |
1.82B
1,828,739,713
|
161 | 999 |
294T
294,132,666,699,207
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
200
|
32
15
|
2,304
3,000
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
6
|
60
|
| Saving Bytes |
80
|
6
|
480
|
| Counter |
313
|
23
|
7,199
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
22
|
4
|
88
|
| Little Box |
400
|
7
|
2,800
|
| Arithmetic Logic Unit (ALU) 1 |
116
|
4
|
464
|
| Conditions |
53
81
|
8
6
|
424
486
|
| Byte Constant |
0
|
0
|
0
|
| Unsigned Less |
70
|
18
|
1,260
|
| Signed Less |
470
|
33
|
15.5K
15,510
|
| LSR |
150
|
5
|
750
|
| Count leading zeroes |
264
|
16
|
4,224
|
| ASR |
150
|
5
|
750
|
| One-hot Encoding |
150
|
5
|
750
|
| Comparison Flags |
2,583
|
132
|
340K
340,956
|
| Symphony ALU |
7,102
7,614
|
135
133
|
958K
958,770
1.01M
1,012,662
|
| Condition Match |
9
11
|
6
5
|
54
55
|
| Objective Beauty |
28
|
8
|
224
|
