COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
16.1K
16,188
|
136 | 490 |
1.07B
1,078,768,320
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
5
|
3
|
15
|
| Bigger OR Gate |
3
|
3
|
9
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
6
|
4
|
24
|
| Half Adder |
7
|
4
|
28
|
| Full Adder |
17
|
8
|
136
|
| Bit inverter |
5
|
3
|
15
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
136
|
64
|
8,704
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
38
|
5
|
190
|
| Signed Negator |
144
|
65
|
9,360
|
| Saving Bytes |
304
|
5
|
1,520
|
| Counter |
473
|
70
|
33.1K
33,110
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
26
|
6
|
156
|
| Little Box |
1,324
|
7
|
9,268
|
| Arithmetic Logic Unit (ALU) 1 |
768
|
260
|
199K
199,680
|
| Arithmetic Logic Unit (ALU) 2 |
570
|
130
|
74.1K
74,100
|
| Conditions |
57
|
12
|
684
|
| Assembly Programming |
16.1K
16,188
|
136
|
2.20M
2,201,568
|
