ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.7K
14,763
|
75 |
25.0K
25,000
|
1.00 |
27.6B
27,680,625,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.7K
14,763
|
75 | 12 |
13.2M
13,286,700
|
| Mod 4 |
14.7K
14,763
|
75 | 5 |
5.53M
5,536,125
|
| Code Breaker |
14.7K
14,763
|
75 | 1,280 |
1.41B
1,417,248,000
|
| The Maze |
14.7K
14,763
|
75 | 1,627 |
1.80B
1,801,455,075
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
|
32
|
2,304
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
16
|
8
|
128
|
| Signed Negator |
80
|
33
|
2,640
|
| Saving Bytes |
128
|
8
|
1,024
|
| Counter |
233
|
41
|
9,553
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
8
|
2
|
16
|
| 3 Bit Decoder |
39
|
6
|
234
|
| Little Box |
639
|
13
|
8,307
|
| Arithmetic Logic Unit (ALU) 1 |
100
|
3
|
300
|
| Arithmetic Logic Unit (ALU) 2 |
391
|
66
|
25.8K
25,806
|
| Conditions |
14
68
|
8
7
|
112
476
|
| Punchcard Programming |
14.7K
14,763
|
75
|
1.10M
1,107,225
|
| Assembly Programming |
14.7K
14,763
|
75
|
1.10M
1,107,225
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
40
|
3
|
120
|
| Equality |
39
|
7
|
273
|
| Unsigned Less |
80
|
12
|
960
|
| Signed Less |
79
|
12
|
948
|
| LSR |
99
|
6
|
594
|
| Count leading zeroes |
264
|
16
|
4,224
|
| ASR |
99
|
6
|
594
|
| One-hot Encoding |
99
|
6
|
594
|
| Comparison Flags |
1,088
|
140
|
152K
152,320
|
| Symphony ALU |
4,597
|
141
|
648K
648,177
|
| Condition Match |
8
|
5
|
40
|
| Objective Beauty |
28
|
8
|
224
|
| Divide |
7,412
|
1,044
|
7.73M
7,738,128
|
| Modulo |
7,533
|
1,047
|
7.88M
7,887,051
|
| Multiply |
751
|
239
|
179K
179,489
|
