ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.6K
14,635
|
55 |
25.0K
25,000
|
1.00 |
20.1B
20,123,125,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.6K
14,676
|
72 | 13 |
13.7M
13,736,736
|
| Mod 4 |
14.6K
14,676
|
72 | 5 |
5.28M
5,283,360
|
| Code Breaker |
14.6K
14,676
|
72 | 1,287 |
1.35B
1,359,936,864
|
| The Maze |
14.6K
14,676
|
72 | 2,053 |
2.16B
2,169,347,616
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
|
32
|
2,304
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
15
|
5
|
75
|
| Signed Negator |
39
|
10
|
390
|
| Saving Bytes |
120
|
5
|
600
|
| Counter |
225
|
38
|
8,550
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
572
|
7
|
4,004
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
428
|
66
|
28.2K
28,248
|
| Conditions |
57
|
10
|
570
|
| Punchcard Programming |
14.6K
14,676
|
72
|
1.05M
1,056,672
|
| Assembly Programming |
14.6K
14,676
|
72
|
1.05M
1,056,672
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
39
|
7
|
273
|
| Unsigned Less |
81
|
34
|
2,754
|
| Signed Less |
89
|
35
|
3,115
|
| Symphony ALU |
5,504
|
141
|
776K
776,064
|
| Condition Match |
8
|
5
|
40
|
| Objective Beauty |
31
|
9
|
279
|
| Multiply |
751
|
239
|
179K
179,489
|
