ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.2K
14,269
|
56 |
25.0K
25,000
|
1.00 |
19.9B
19,976,600,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| The Maze |
14.3K
14,345
|
56 | 1,727 |
1.38B
1,387,333,640
|
| Tower of Hanoi |
1.00B
1,006,653,477
|
154 | 1,393 |
215T
215,949,317,192,994
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
178
|
32
15
|
2,304
2,670
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
80
|
33
|
2,640
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
185
|
39
|
7,215
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
7
|
2
|
14
|
| 3 Bit Decoder |
26
|
4
|
104
|
| Little Box |
443
|
10
|
4,430
|
| Arithmetic Logic Unit (ALU) 1 |
179
|
7
|
1,253
|
| Conditions |
14
54
|
9
7
|
126
378
|
| Punchcard Programming |
14.2K
14,269
|
56
|
799K
799,064
|
| Assembly Programming |
14.2K
14,269
|
56
|
799K
799,064
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
39
|
5
|
195
|
| Unsigned Less |
75
|
10
|
750
|
| LSR |
99
|
6
|
594
|
| ASR |
99
|
6
|
594
|
| One-hot Encoding |
99
|
6
|
594
|
| Comparison Flags |
899
|
140
|
125K
125,860
|
| Symphony ALU |
4,429
5,185
|
130
33
|
575K
575,770
171K
171,105
|
| Condition Match |
9
|
6
|
54
|
| Objective Beauty |
39
|
10
|
390
|
| Divide |
1,463
2,205
|
252
133
|
368K
368,676
293K
293,265
|
| Modulo |
1,448
2,296
|
273
137
|
395K
395,304
314K
314,552
|
| Multiply |
632
1,374
|
225
106
|
142K
142,200
145K
145,644
|
