COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference | 600 | 96 | 1 |
57.6K
57,600
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
3
|
2
|
6
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
15
|
4
|
60
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
120
|
32
|
3,840
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
128
|
33
|
4,224
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
226
|
39
|
8,814
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| Little Box |
368
|
6
|
2,208
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
563
|
66
|
37.1K
37,158
|
| Conditions |
50
|
7
|
350
|
| Punchcard Programming |
14.5K
14,507
|
72
|
1.04M
1,044,504
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
259
|
70
|
18.1K
18,130
|
| Unsigned Less |
144
|
37
|
5,328
|
| Signed Less |
152
|
38
|
5,776
|
| LSR |
91
|
4
|
364
|
| ASR |
147
|
4
|
588
|
| One hot encoding |
91
|
4
|
364
|
