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Венера
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ARCHITECTURE LEVELS

LEVEL GATE DELAY CYCLE
IPC Instructions per cycle
ENERGY
Overture
16.0K 16,074
127
25.0K 25,000
1.00
51.0B 51,034,950,000

PROGRAMMING LEVELS

LEVEL GATE DELAY CYCLE ENERGY
Circumference
18.1K 18,163
221 495
1.98B 1,986,941,385
Mod 4
18.1K 18,163
221 5
20.0M 20,070,115
Code Breaker
18.1K 18,163
221 1,791
7.18B 7,189,115,193
The Maze
17.4K 17,442
149 3,304
8.58B 8,586,626,832

COMPONENT LEVELS

LEVEL GATE DELAY ENERGY
NOT Gate
1
1
1
XOR Gate
3
2
6
Bigger OR Gate
2
2
4
Bigger AND Gate
2
2
4
XNOR Gate
12
9
108
Half Adder
9
6
54
Full Adder
9
4
36
Bit Inverter
8
6
48
Byte NOT
8
1
8
Byte NAND
8
1
8
Adding Bytes
72
18
1,296
Multiplexer
33
2
66
Saving Gracefully
41
8
328
Signed Negator
80
33
2,640
Saving Bytes
328
8
2,624
Counter
145
23
3,335
1 Bit Decoder
1
1
1
2 Bit Decoder
6
2
12
3 Bit Decoder
28
4
112
Little Box
1,460
10
14.6K 14,600
Arithmetic Logic Unit (ALU) 1
148
4
592
Arithmetic Logic Unit (ALU) 2
428
52
22.2K 22,256
Conditions
55
8
440
Punchcard Programming
18.1K 18,163
221
4.01M 4,014,023
Assembly Programming
18.1K 18,163
221
4.01M 4,014,023
Byte Constant
0
0
0
Byte XOR
56
4
224
Equality
79
12
948
Unsigned Less
80
19
1,520
Signed Less
86
21
1,806
LSR
99
6
594
Count leading zeroes
288
32
9,216
ASR
99
6
594
One-hot Encoding
99
6
594
Comparison Flags
1,055
84
88.6K 88,620
Symphony ALU
4,710
87
409K 409,770
Condition Match
13
9
117
Objective Beauty
28
8
224
Divide
1,296
227
294K 294,192
Modulo
1,184
227
268K 268,768
Multiply
751
141
105K 105,891