ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.7K
14,767
|
93 |
25.0K
25,000
|
1.00 |
34.3B
34,333,275,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.8K
14,837
|
117 | 12 |
20.8M
20,831,148
|
| Mod 4 |
14.8K
14,837
|
117 | 5 |
8.67M
8,679,645
|
| Nim |
1.82B
1,828,738,736
|
172 | 25 |
7.86T
7,863,576,564,800
|
| Random Number Generator |
1.82B
1,828,738,736
|
172 | 1,037 |
326T
326,181,155,907,904
|
| Delicious order |
1.82B
1,828,738,736
|
172 | 5,604 |
1,762T
1,762,699,322,765,568
|
| Capitalize |
1.82B
1,828,738,736
|
172 | 1,277 |
401T
401,671,490,929,984
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
96
104
|
32
16
|
3,072
1,664
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
37
|
9
|
333
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
209
|
38
|
7,942
|
| 1 Bit Decoder |
9
|
4
|
36
|
| 2 Bit Decoder |
12
|
4
|
48
|
| 3 Bit Decoder |
47
|
8
|
376
|
| Little Box |
396
|
6
|
2,376
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
519
|
66
|
34.2K
34,254
|
| Conditions |
82
|
9
|
738
|
| Punchcard Programming |
14.8K
14,837
|
117
|
1.73M
1,735,929
|
| Assembly Programming |
14.8K
14,837
|
117
|
1.73M
1,735,929
|
| One-hot Encoding |
175
|
9
|
1,575
|
| Comparison Flags |
1,163
|
140
|
162K
162,820
|
| Symphony ALU |
6,618
6,650
|
169
141
|
1.11M
1,118,442
937K
937,650
|
| Condition Match |
136
|
6
|
816
|
| Objective Beauty |
29
|
8
|
232
|
| Divide |
20.5K
20,583
|
752
|
15.4M
15,478,416
|
| Modulo |
21.5K
21,583
|
914
|
19.7M
19,726,862
|
| Multiply |
800
|
97
|
77.6K
77,600
|
