COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Mod 4 |
14.8K
14,893
|
72 | 5 |
5.36M
5,361,480
|
| Code Breaker |
14.8K
14,893
|
72 | 1,792 |
1.92B
1,921,554,432
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
14
|
4
|
56
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
112
|
32
|
3,584
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
120
|
33
|
3,960
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
225
|
39
|
8,775
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
58
|
5
|
290
|
| Little Box |
396
|
6
|
2,376
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
578
|
66
|
38.1K
38,148
|
| Conditions |
93
|
8
|
744
|
| Equality |
39
|
7
|
273
|
| Unsigned Less |
354
|
67
|
23.7K
23,718
|
| Signed Less |
761
|
72
|
54.7K
54,792
|
| LSR |
186
|
6
|
1,116
|
| Count leading zeroes |
187
|
7
|
1,309
|
| ASR |
188
|
6
|
1,128
|
| One hot encoding |
186
|
6
|
1,116
|
| Comparison Flags |
5,098
|
288
|
1.46M
1,468,224
|
| Symphony ALU |
11.7K
11,749
|
289
|
3.39M
3,395,461
|
| Condition Match |
11
|
5
|
55
|
| Multiply |
2,536
|
232
|
588K
588,352
|
| Divide |
61.5K
61,532
|
2,925
|
179M
179,981,100
|
| Modulo |
64.3K
64,300
|
3,222
|
207M
207,174,600
|
