ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.3K
14,337
|
88 |
25.0K
25,000
|
1.00 |
31.5B
31,541,400,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.3K
14,397
|
88 | 11 |
13.9M
13,936,296
|
| Mod 4 |
14.3K
14,397
|
88 | 5 |
6.33M
6,334,680
|
| Code Breaker |
14.3K
14,397
|
88 | 1,786 |
2.26B
2,262,747,696
|
| The Maze |
14.3K
14,397
|
88 | 2,293 |
2.90B
2,905,084,248
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
11
|
4
|
44
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
|
32
|
2,816
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
36
|
9
|
324
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
201
|
39
|
7,839
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
408
|
7
|
2,856
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
413
|
68
|
28.0K
28,084
|
| Conditions |
55
|
8
|
440
|
| Punchcard Programming |
14.3K
14,397
|
88
|
1.26M
1,266,936
|
| Assembly Programming |
14.3K
14,397
|
88
|
1.26M
1,266,936
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
39
|
8
|
312
|
| Unsigned Less |
59
|
12
|
708
|
| Signed Less |
60
|
13
|
780
|
| LSR |
99
|
6
|
594
|
| Count leading zeroes |
264
|
16
|
4,224
|
| ASR |
99
|
6
|
594
|
| One-hot Encoding |
99
|
6
|
594
|
| Comparison Flags |
1,095
|
152
|
166K
166,440
|
| Symphony ALU |
4,267
|
135
|
576K
576,045
|
| Condition Match |
8
|
5
|
40
|
| Objective Beauty |
28
|
8
|
224
|
| Divide |
1,398
|
253
|
353K
353,694
|
| Modulo |
1,504
|
273
|
410K
410,592
|
| Multiply |
744
|
97
|
72.1K
72,168
|
