ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
15.6K
15,692
|
41 |
25.0K
25,000
|
1.00 |
16.0B
16,084,300,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
15.8K
15,876
|
73 | 59 |
68.3M
68,377,932
|
| Mod 4 |
15.8K
15,876
|
73 | 5 |
5.79M
5,794,740
|
| Code Breaker |
15.8K
15,876
|
73 | 1,281 |
1.48B
1,484,612,388
|
| The Maze |
15.6K
15,692
|
34 | 3,049 |
1.62B
1,626,726,872
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
5
|
3
|
15
|
| Full Adder |
11
|
4
|
44
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
|
32
|
2,816
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
38
|
6
|
228
|
| Signed Negator |
48
|
11
|
528
|
| Saving Bytes |
304
|
6
|
1,824
|
| Counter |
113
|
15
|
1,695
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
16
|
3
|
48
|
| Little Box |
1,300
|
7
|
9,100
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
328
|
34
|
11.1K
11,152
|
| Conditions |
156
|
7
|
1,092
|
| Punchcard Programming |
15.8K
15,876
|
73
|
1.15M
1,158,948
|
| Assembly Programming |
15.8K
15,876
|
73
|
1.15M
1,158,948
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
31
|
7
|
217
|
| Unsigned Less |
97
|
11
|
1,067
|
| Signed Less |
133
|
12
|
1,596
|
| LSR |
99
|
6
|
594
|
| Count leading zeroes |
264
|
16
|
4,224
|
| ASR |
99
|
6
|
594
|
| One-hot Encoding |
99
|
6
|
594
|
| Comparison Flags |
1,146
|
48
|
55.0K
55,008
|
| Symphony ALU |
4,586
|
134
|
614K
614,524
|
| Condition Match |
8
|
5
|
40
|
| Objective Beauty |
40
|
10
|
400
|
| Multiply |
863
|
239
|
206K
206,257
|
