ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.2K
14,206
|
38 |
25.0K
25,000
|
1.00 |
13.4B
13,495,700,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.2K
14,206
|
41 | 12 |
6.98M
6,989,352
|
| Mod 4 |
14.2K
14,206
|
41 | 5 |
2.91M
2,912,230
|
| Code Breaker |
14.2K
14,206
|
41 | 2,298 |
1.33B
1,338,460,908
|
| The Maze | 42 | 10 | 479 |
201K
201,180
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
3
|
2
|
6
|
| Full Adder |
7
|
4
|
28
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
107
127
135
|
9
8
7
|
963
1,016
945
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
27
|
5
|
135
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
103
104
|
12
11
|
1,236
1,144
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
4
|
2
|
8
|
| 3 Bit Decoder |
20
|
3
|
60
|
| Little Box |
456
|
10
|
4,560
|
| Arithmetic Logic Unit (ALU) 1 |
136
|
7
|
952
|
| Arithmetic Logic Unit (ALU) 2 |
344
|
19
|
6,536
|
| Conditions |
47
|
7
|
329
|
| Punchcard Programming |
14.2K
14,206
|
41
|
582K
582,446
|
| Assembly Programming |
14.2K
14,206
|
41
|
582K
582,446
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
31
|
5
|
155
|
| Unsigned Less |
71
|
10
|
710
|
| Signed Less |
78
|
12
|
936
|
| LSR |
89
|
3
|
267
|
| Count leading zeroes |
45
|
10
|
450
|
| ASR |
99
|
6
|
594
|
| One-hot Encoding |
89
|
3
|
267
|
| Comparison Flags |
364
|
19
|
6,916
|
| Symphony ALU |
3,730
4,586
|
58
36
|
216K
216,340
165K
165,096
|
| Condition Match |
8
|
5
|
40
|
| Objective Beauty |
31
|
5
|
155
|
| Divide |
1,364
|
117
|
159K
159,588
|
| Modulo |
1,364
|
117
|
159K
159,588
|
| Multiply |
299
|
29
|
8,671
|
