COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
16.6K
16,673
|
192 | 9 |
28.8M
28,810,944
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
4
|
3
|
12
|
| Bigger OR Gate |
3
|
2
|
6
|
| Bigger AND Gate |
3
|
2
|
6
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
5
|
3
|
15
|
| Full Adder |
11
|
6
|
66
|
| Bit inverter |
4
|
3
|
12
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
256
|
88
|
22.5K
22,528
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
38
|
5
|
190
|
| Signed Negator |
264
|
89
|
23.4K
23,496
|
| Saving Bytes |
304
|
5
|
1,520
|
| Counter |
362
|
94
|
34.0K
34,028
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
25
|
10
|
250
|
| 3 Bit Decoder |
44
|
4
|
176
|
| Little Box |
1,296
|
6
|
7,776
|
| Arithmetic Logic Unit (ALU) 1 |
100
|
3
|
300
|
| Arithmetic Logic Unit (ALU) 2 |
956
|
178
|
170K
170,168
|
| Conditions |
197
|
6
|
1,182
|
| Punchcard Programming |
16.6K
16,673
|
192
|
3.20M
3,201,216
|
| Assembly Programming |
16.6K
16,673
|
192
|
3.20M
3,201,216
|
