ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
15.8K
15,883
|
49 |
25.0K
25,000
|
1.00 |
19.4B
19,456,675,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
16.0K
16,029
|
121 | 13 |
25.2M
25,213,617
|
| Mod 4 |
15.9K
15,965
|
105 | 5 |
8.38M
8,381,625
|
| Code Breaker |
16.0K
16,029
|
121 | 1,279 |
2.48B
2,480,632,011
|
| The Maze |
15.9K
15,965
|
105 | 1,838 |
3.08B
3,081,085,350
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
11
|
4
|
44
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
|
32
|
2,816
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
38
|
6
|
228
|
| Signed Negator |
36
|
9
|
324
|
| Saving Bytes |
304
|
6
|
1,824
|
| Counter |
365
|
16
|
5,840
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
25
|
4
|
100
|
| Little Box |
1,292
|
7
|
9,044
|
| Arithmetic Logic Unit (ALU) 1 |
100
|
3
|
300
|
| Arithmetic Logic Unit (ALU) 2 |
365
|
42
|
15.3K
15,330
|
| Conditions |
56
|
8
|
448
|
| Punchcard Programming |
16.0K
16,029
|
121
|
1.93M
1,939,509
|
| Assembly Programming |
16.0K
16,029
|
121
|
1.93M
1,939,509
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
128
|
38
|
4,864
|
| Unsigned Less |
96
|
33
|
3,168
|
| Signed Less |
144
|
35
|
5,040
|
| LSR |
153
|
5
|
765
|
| Count leading zeroes |
223
|
15
|
3,345
|
| ASR |
153
|
5
|
765
|
| One-hot Encoding |
153
|
5
|
765
|
| Comparison Flags |
2,541
|
208
|
528K
528,528
|
| Symphony ALU |
6,128
|
141
|
864K
864,048
|
| Condition Match |
11
|
5
|
55
|
| Objective Beauty |
28
|
8
|
224
|
| Multiply |
968
|
337
|
326K
326,216
|
