ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture | 1,546 | 149 |
25.0K
25,000
|
1.00 |
5.75B
5,758,850,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.0K
14,086
|
30 | 76 |
32.1M
32,116,080
|
| Mod 4 |
14.0K
14,086
|
30 | 5 |
2.11M
2,112,900
|
| Code Breaker |
14.0K
14,086
|
30 | 372 |
157M
157,199,760
|
| The Maze |
14.0K
14,086
|
30 | 6,568 |
2.77B
2,775,505,440
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
3
|
2
|
6
|
| Full Adder |
7
|
4
|
28
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
56
70
|
32
18
|
1,792
1,260
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
30
|
9
|
270
|
| Saving Bytes |
73
|
5
|
365
|
| Counter |
95
|
14
|
1,330
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
4
|
2
|
8
|
| 3 Bit Decoder |
14
|
3
|
42
|
| Little Box |
368
|
5
|
1,840
|
| Arithmetic Logic Unit (ALU) 1 |
100
|
3
|
300
|
| Arithmetic Logic Unit (ALU) 2 |
290
|
20
|
5,800
|
| Conditions |
13
23
50
|
7
6
4
|
91
138
200
|
| Punchcard Programming |
14.0K
14,090
|
30
|
422K
422,700
|
| Assembly Programming |
14.0K
14,090
|
30
|
422K
422,700
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
31
|
5
|
155
|
| Unsigned Less |
130
140
|
17
16
|
2,210
2,240
|
| Signed Less |
131
|
17
|
2,227
|
| LSR |
99
|
6
|
594
|
| Count leading zeroes |
160
|
17
|
2,720
|
| ASR |
99
|
6
|
594
|
| One-hot Encoding |
99
|
6
|
594
|
| Comparison Flags |
1,328
|
68
|
90.3K
90,304
|
| Symphony ALU |
4,737
|
74
|
350K
350,538
|
| Condition Match |
19
|
5
|
95
|
| Objective Beauty |
22
|
8
|
176
|
| Multiply |
520
618
|
225
127
|
117K
117,000
78.4K
78,486
|
