ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.2K
14,255
|
86 |
25.0K
25,000
|
1.00 |
30.6B
30,648,250,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference | 96 | 14 | 1 | 1,344 |
| Mod 4 | 0 | 0 | 1 | 0 |
| Code Breaker |
14.2K
14,203
|
85 | 1,072 |
1.29B
1,294,177,360
|
| The Maze |
14.3K
14,315
|
86 | 2,033 |
2.50B
2,502,805,970
|
| Nim | 2 | 2 | 3 | 12 |
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
3
|
2
|
6
|
| Full Adder |
7
|
4
|
28
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
96
|
32
14
|
2,816
1,344
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
36
|
9
|
324
|
| Saving Bytes |
73
|
5
|
365
|
| Counter |
201
|
38
|
7,638
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
4
|
2
|
8
|
| 3 Bit Decoder |
19
|
3
|
57
|
| Little Box |
368
|
6
|
2,208
|
| Arithmetic Logic Unit (ALU) 1 |
116
|
4
|
464
|
| Arithmetic Logic Unit (ALU) 2 |
367
|
67
|
24.5K
24,589
|
| Conditions |
13
|
7
|
91
|
| Punchcard Programming |
14.2K
14,203
|
85
|
1.20M
1,207,255
|
| Assembly Programming |
14.3K
14,315
|
86
|
1.23M
1,231,090
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
32
|
8
|
256
|
| Unsigned Less |
64
109
|
25
11
|
1,600
1,199
|
| Signed Less |
66
|
26
|
1,716
|
| LSR |
150
|
5
|
750
|
| Count leading zeroes |
166
|
9
|
1,494
|
| ASR |
150
|
5
|
750
|
| One-hot Encoding |
150
|
5
|
750
|
| Comparison Flags |
705
|
104
|
73.3K
73,320
|
| Symphony ALU |
5,376
5,405
|
129
105
|
693K
693,504
567K
567,525
|
| Condition Match |
15
|
10
|
150
|
| Objective Beauty |
28
|
8
|
224
|
| Multiply |
744
|
225
|
167K
167,400
|
