ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.6K
14,613
|
90 |
25.0K
25,000
|
1.00 |
32.8B
32,879,250,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.6K
14,693
|
106 | 12 |
18.6M
18,689,496
|
| Mod 4 |
14.6K
14,693
|
106 | 5 |
7.78M
7,787,290
|
| Code Breaker |
14.6K
14,693
|
106 | 2,456 |
3.82B
3,825,116,848
|
| The Maze |
14.6K
14,613
|
90 | 2,130 |
2.80B
2,801,312,100
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
11
|
4
|
44
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
|
32
|
2,816
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
128
|
49
|
6,272
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
233
|
55
|
12.8K
12,815
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
400
|
6
|
2,400
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
572
|
98
|
56.0K
56,056
|
| Conditions |
111
|
11
|
1,221
|
| Punchcard Programming |
14.6K
14,693
|
106
|
1.55M
1,557,458
|
| Assembly Programming |
14.6K
14,693
|
106
|
1.55M
1,557,458
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
39
|
8
|
312
|
| Unsigned Less |
97
|
34
|
3,298
|
| Signed Less |
103
110
|
36
21
|
3,708
2,310
|
| LSR |
156
|
5
|
780
|
| Count leading zeroes |
38
|
8
|
304
|
| ASR |
156
|
5
|
780
|
| One-hot Encoding |
156
|
5
|
780
|
| Comparison Flags |
1,046
1,077
|
144
136
|
150K
150,624
146K
146,472
|
| Symphony ALU |
5,831
5,862
|
145
137
|
845K
845,495
803K
803,094
|
| Condition Match |
10
|
6
|
60
|
| Objective Beauty |
28
|
8
|
224
|
| Multiply |
904
|
145
|
131K
131,080
|
