COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
15.4K
15,404
|
138 | 13 |
27.6M
27,634,776
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
7
|
4
|
28
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
8
|
5
|
40
|
| Half Adder |
8
|
4
|
32
|
| Full Adder |
22
|
8
|
176
|
| Bit inverter |
4
|
3
|
12
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
176
|
64
|
11.2K
11,264
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
11
|
6
|
66
|
| Signed Negator |
184
|
65
|
11.9K
11,960
|
| Saving Bytes |
88
|
6
|
528
|
| Counter |
249
|
69
|
17.1K
17,181
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
25
|
8
|
200
|
| 3 Bit Decoder |
36
|
4
|
144
|
| Little Box |
428
|
7
|
2,996
|
| Arithmetic Logic Unit (ALU) 1 |
100
|
3
|
300
|
| Arithmetic Logic Unit (ALU) 2 |
707
|
130
|
91.9K
91,910
|
| Conditions |
82
|
15
|
1,230
|
| Punchcard Programming |
15.4K
15,404
|
138
|
2.12M
2,125,752
|
| Assembly Programming |
15.4K
15,404
|
138
|
2.12M
2,125,752
|
