ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.5K
14,561
|
105 |
25.0K
25,000
|
1.00 |
38.2B
38,222,625,000
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| Counter |
190
|
58
|
11.0K
11,020
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
568
|
8
|
4,544
|
| Arithmetic Logic Unit (ALU) 1 |
132
|
4
|
528
|
| Arithmetic Logic Unit (ALU) 2 |
388
|
52
|
20.1K
20,176
|
| Conditions |
55
|
6
|
330
|
| Multiply |
688
|
225
|
154K
154,800
|
