ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
15.2K
15,289
|
123 |
25.0K
25,000
|
1.00 |
47.0B
47,013,675,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| The Maze |
15.5K
15,528
|
203 | 1,483 |
4.67B
4,674,688,872
|
| Nim |
1.82B
1,828,740,298
|
183 | 7 |
2.34T
2,342,616,321,738
|
| Random Number Generator |
1.82B
1,828,740,298
|
183 | 520 |
174T
174,022,926,757,680
|
| Capitalize |
1.82B
1,828,740,298
|
183 | 505 |
169T
169,003,034,639,670
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
2
|
2
|
4
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
9
|
8
|
72
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
10
|
4
|
40
|
| Bit Inverter |
7
|
6
|
42
|
| Byte NOT |
16
|
2
|
32
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
80
|
32
|
2,560
|
| Multiplexer |
34
|
3
|
102
|
| Saving Gracefully |
24
|
7
|
168
|
| Signed Negator |
47
|
11
|
517
|
| Saving Bytes |
192
|
7
|
1,344
|
| Counter |
370
|
104
|
38.4K
38,480
|
| 1 Bit Decoder |
2
|
2
|
4
|
| 2 Bit Decoder |
28
|
7
|
196
|
| 3 Bit Decoder |
20
|
4
|
80
|
| Little Box |
852
|
8
|
6,816
|
| Arithmetic Logic Unit (ALU) 1 |
124
|
4
|
496
|
| Arithmetic Logic Unit (ALU) 2 |
594
|
195
|
115K
115,830
|
| Conditions |
53
|
11
|
583
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
47
|
9
|
423
|
| Unsigned Less |
146
|
32
|
4,672
|
| Signed Less |
240
|
34
|
8,160
|
| LSR |
102
|
9
|
918
|
| Count leading zeroes |
1,238
|
56
|
69.3K
69,328
|
| ASR |
102
|
9
|
918
|
| One-hot Encoding |
102
|
9
|
918
|
| Comparison Flags |
2,029
|
136
|
275K
275,944
|
| Symphony ALU |
5,743
|
137
|
786K
786,791
|
| Condition Match |
483
|
21
|
10.1K
10,143
|
| Objective Beauty |
31
|
9
|
279
|
| Divide |
6,557
|
512
|
3.35M
3,357,184
|
| Modulo |
5,290
|
385
|
2.03M
2,036,650
|
| Multiply |
1,136
|
385
|
437K
437,360
|
