ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture | 2,348 | 28 |
29.4K
29,489
|
0.84 |
1.93B
1,938,724,816
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.6K
14,676
|
71 | 13 |
13.5M
13,545,948
|
| Mod 4 |
14.6K
14,653
|
43 | 5 |
3.15M
3,150,395
|
| Code Breaker |
14.6K
14,676
|
71 | 526 |
548M
548,089,896
|
| The Maze |
14.5K
14,536
|
53 | 2,498 |
1.92B
1,924,479,184
|
| Nim |
184M
184,573,068
|
281 | 80 |
4.14T
4,149,202,568,640
|
| Random Number Generator |
184M
184,573,024
|
281 | 520 |
26.9T
26,969,810,266,880
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
3
|
2
|
6
|
| Full Adder |
10
|
4
|
40
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
64
72
189
|
32
17
7
|
2,048
1,224
1,323
|
| Multiplexer |
33
|
2
|
66
|
| Signed Negator |
43
72
|
10
3
|
430
216
|
| Conditions |
47
|
9
|
423
|
| Punchcard Programming |
14.7K
14,736
|
103
|
1.51M
1,517,808
|
| Assembly Programming |
14.6K
14,676
|
71
|
1.04M
1,041,996
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
40
|
3
|
120
|
| Equality |
87
|
12
|
1,044
|
| Unsigned Less |
116
|
6
|
696
|
| Signed Less |
131
|
7
|
917
|
| LSR |
148
|
4
|
592
|
| Count leading zeroes |
53
|
10
|
530
|
| ASR |
148
|
4
|
592
|
| Symphony ALU |
5,776
6,400
6,531
7,222
7,296
|
106
65
42
41
35
|
612K
612,256
416K
416,000
274K
274,302
296K
296,102
255K
255,360
|
| Objective Beauty |
35
|
9
|
315
|
| Divide |
2,417
3,185
3,190
|
264
81
74
|
638K
638,088
257K
257,985
236K
236,060
|
| Modulo |
2,417
3,185
3,417
|
265
82
75
|
640K
640,505
261K
261,170
256K
256,275
|
| Multiply |
632
|
69
|
43.6K
43,608
|
