ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture | 1,992 | 172 |
25.0K
25,000
|
1.00 |
8.56B
8,565,600,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.6K
14,676
|
71 | 13 |
13.5M
13,545,948
|
| Mod 4 |
14.6K
14,676
|
71 | 5 |
5.20M
5,209,980
|
| Code Breaker |
14.6K
14,676
|
71 | 526 |
548M
548,089,896
|
| The Maze |
14.6K
14,672
|
92 | 2,498 |
3.37B
3,371,860,352
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
5
|
3
|
15
|
| Half Adder |
3
|
2
|
6
|
| Full Adder |
10
|
4
|
40
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
64
72
|
32
17
|
2,048
1,224
|
| Multiplexer |
33
|
2
|
66
|
| Signed Negator |
43
|
10
|
430
|
| Conditions |
47
|
9
|
423
|
| Punchcard Programming |
14.7K
14,736
|
103
|
1.51M
1,517,808
|
| Assembly Programming |
14.6K
14,676
|
71
|
1.04M
1,041,996
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
40
|
3
|
120
|
| Equality |
87
|
12
|
1,044
|
| Unsigned Less |
140
|
30
|
4,200
|
| Signed Less |
152
|
31
|
4,712
|
| LSR |
148
|
4
|
592
|
| Count leading zeroes |
67
|
11
|
737
|
| ASR |
148
|
4
|
592
|
| Symphony ALU |
5,776
|
106
|
612K
612,256
|
| Objective beauty |
35
|
9
|
315
|
| Divide |
2,417
|
264
|
638K
638,088
|
| Modulo |
2,417
|
265
|
640K
640,505
|
| Multiply |
632
|
69
|
43.6K
43,608
|
