ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture | 2,141 | 40 |
28.5K
28,587
|
0.87 |
2.44B
2,448,190,680
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.2K
14,284
|
54 | 9 |
6.94M
6,942,024
|
| Mod 4 |
14.2K
14,284
|
54 | 5 |
3.85M
3,856,680
|
| Code Breaker |
14.2K
14,284
|
54 | 1,278 |
985M
985,767,408
|
| The Maze |
14.2K
14,284
|
54 | 1,775 |
1.36B
1,369,121,400
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
3
|
2
|
6
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
|
32
|
2,304
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
80
|
33
|
2,640
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
145
|
37
|
5,365
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
412
|
7
|
2,884
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
308
|
34
|
10.4K
10,472
|
| Conditions |
55
|
8
|
440
|
| Punchcard Programming |
14.3K
14,300
|
54
|
772K
772,200
|
| Assembly Programming |
14.3K
14,300
|
54
|
772K
772,200
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
31
|
5
|
155
|
| Unsigned Less |
81
|
34
|
2,754
|
| Signed Less |
79
|
35
|
2,765
|
| LSR |
99
|
6
|
594
|
| Count leading zeroes |
174
|
9
|
1,566
|
| ASR |
99
|
6
|
594
|
| One-hot Encoding |
99
|
6
|
594
|
| Comparison Flags |
836
|
140
|
117K
117,040
|
| Symphony ALU |
4,409
|
141
|
621K
621,669
|
| Condition Match |
8
|
5
|
40
|
| Objective Beauty |
28
|
8
|
224
|
| Divide |
1,624
|
289
|
469K
469,336
|
| Modulo |
1,624
|
290
|
470K
470,960
|
| Multiply |
751
1,461
|
239
232
|
179K
179,489
338K
338,952
|
