ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.2K
14,280
|
52 |
25.0K
25,000
|
1.00 |
18.5B
18,564,000,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.3K
14,386
|
72 | 12 |
12.4M
12,429,504
|
| Mod 4 |
14.3K
14,386
|
72 | 5 |
5.17M
5,178,960
|
| Code Breaker |
14.3K
14,386
|
72 | 2,808 |
2.90B
2,908,503,936
|
| The Maze |
14.3K
14,386
|
72 | 1,994 |
2.06B
2,065,369,248
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
11
|
4
|
44
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
84
|
13
|
1,092
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
92
|
14
|
1,288
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
157
|
18
|
2,826
|
| 1 Bit Decoder |
1
|
1
|
1
|
| Little Box |
426
|
6
|
2,556
|
| Arithmetic Logic Unit (ALU) 1 |
116
|
4
|
464
|
| Arithmetic Logic Unit (ALU) 2 |
340
|
15
|
5,100
|
| Conditions |
13
49
59
|
9
8
5
|
117
392
295
|
| Punchcard Programming |
14.3K
14,386
|
72
|
1.03M
1,035,792
|
| Assembly Programming |
14.3K
14,386
|
72
|
1.03M
1,035,792
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
31
41
|
7
4
|
217
164
|
| Unsigned Less |
92
|
14
|
1,288
|
| Signed Less |
100
|
20
|
2,000
|
| LSR |
148
|
4
|
592
|
| Count leading zeroes |
603
|
93
|
56.0K
56,079
|
| ASR |
148
|
4
|
592
|
| One hot encoding |
148
|
4
|
592
|
| Comparison Flags |
978
|
80
|
78.2K
78,240
|
| Symphony ALU |
5,671
|
81
|
459K
459,351
|
| Condition Match |
13
|
8
|
104
|
| Objective beauty |
28
|
8
|
224
|
| Divide |
1,388
|
170
|
235K
235,960
|
| Modulo |
1,324
|
170
|
225K
225,080
|
| Multiply |
852
|
41
|
34.9K
34,932
|
