ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture | 1,459 | 166 |
25.0K
25,000
|
1.00 |
6.05B
6,054,850,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Nim |
12.0K
12,065
|
81 | 14 |
13.6M
13,681,710
|
| Random Number Generator |
13.8K
13,889
|
81 | 520 |
585M
585,004,680
|
| Delicious order |
39.4K
39,425
|
82 | 1,618 |
5.23B
5,230,751,300
|
| Capitalize |
13.8K
13,889
|
81 | 801 |
901M
901,132,209
|
| Tower of Hanoi |
39.4K
39,425
|
82 | 991 |
3.20B
3,203,754,350
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
3
|
2
|
6
|
| Full Adder |
7
|
4
|
28
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
56
106
|
18
13
|
1,008
1,378
|
| Multiplexer |
25
33
|
3
2
|
75
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
32
35
|
10
6
|
320
210
|
| Saving Bytes |
73
|
6
|
438
|
| Counter |
92
|
12
|
1,104
|
| 1 Bit Decoder |
1
|
1
|
1
|
| Little Box |
376
|
7
|
2,632
|
| Arithmetic Logic Unit (ALU) 1 |
131
|
7
|
917
|
| Arithmetic Logic Unit (ALU) 2 |
188
220
238
|
25
23
20
|
4,700
5,060
4,760
|
| Conditions |
13
|
7
|
91
|
| Punchcard Programming |
14.0K
14,003
|
47
|
658K
658,141
|
| Assembly Programming |
13.9K
13,964
|
46
|
642K
642,344
|
| Unsigned Less |
60
|
12
|
720
|
| Signed Less |
63
|
14
|
882
|
| Comparison Flags |
739
|
56
|
41.3K
41,384
|
| Symphony ALU |
5,191
|
57
|
295K
295,887
|
| Condition Match |
11
|
5
|
55
|
| Objective beauty |
24
|
9
|
216
|
