ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture | 1,432 | 164 |
25.0K
25,000
|
1.00 |
5.87B
5,871,200,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference | 37 | 21 | 1 | 777 |
| Mod 4 | 0 | 0 | 1 | 0 |
| Code Breaker | 360 | 36 | 17 |
220K
220,320
|
| The Maze | 180 | 14 | 956 |
2.40M
2,409,120
|
| Nim | 2 | 2 | 3 | 12 |
| Random Number Generator | 413 | 11 | 66 |
299K
299,838
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
3
|
2
|
6
|
| Full Adder |
7
|
4
|
28
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
56
97
|
32
18
|
1,792
1,746
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
21
22
|
8
7
|
168
154
|
| Saving Bytes |
73
|
5
|
365
|
| Counter |
95
|
14
|
1,330
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
20
|
5
|
100
|
| Little Box |
368
|
6
|
2,208
|
| Arithmetic Logic Unit (ALU) 1 |
80
|
5
|
400
|
| Arithmetic Logic Unit (ALU) 2 |
169
204
|
35
21
|
5,915
4,284
|
| Conditions |
13
23
|
7
6
|
91
138
|
| Punchcard Programming |
13.6K
13,611
|
8
|
108K
108,888
|
| Assembly Programming |
13.6K
13,611
|
8
|
108K
108,888
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
31
|
5
|
155
|
| Unsigned Less |
54
65
|
14
12
|
756
780
|
| Signed Less |
60
|
16
|
960
|
| LSR |
87
|
4
|
348
|
| Count leading zeroes |
29
|
8
|
232
|
| ASR |
143
|
4
|
572
|
| One hot encoding |
87
|
4
|
348
|
| Comparison Flags |
373
421
|
58
50
|
21.6K
21,634
21.0K
21,050
|
| Symphony ALU |
3,728
|
77
|
287K
287,056
|
| Condition Match |
8
|
5
|
40
|
| Objective beauty |
22
|
8
|
176
|
| Multiply |
206
|
24
|
4,944
|
