ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.6K
14,610
|
41 |
25.0K
25,000
|
1.00 |
14.9B
14,975,250,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Mod 4 |
14.7K
14,726
|
83 | 5 |
6.11M
6,111,290
|
| The Maze |
14.7K
14,726
|
83 | 1,911 |
2.33B
2,335,735,038
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| XOR Gate |
3
|
2
|
6
|
| Full Adder |
11
|
4
|
44
|
| Adding Bytes |
88
|
32
|
2,816
|
| Multiplexer |
33
|
2
|
66
|
| Signed Negator |
96
|
33
|
3,168
|
| 2 Bit Decoder |
6
|
2
|
12
|
| Arithmetic Logic Unit (ALU) 2 |
380
|
34
|
12.9K
12,920
|
| Conditions |
49
|
8
|
392
|
| Punchcard Programming |
14.7K
14,726
|
83
|
1.22M
1,222,258
|
| Assembly Programming |
14.7K
14,726
|
83
|
1.22M
1,222,258
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
32
|
3
|
96
|
| Equality |
31
|
5
|
155
|
| Unsigned Less |
97
|
34
|
3,298
|
| Signed Less |
93
|
35
|
3,255
|
| LSR |
150
|
12
|
1,800
|
| Count leading zeroes |
1,070
|
55
|
58.8K
58,850
|
| ASR |
150
|
12
|
1,800
|
| One-hot Encoding |
150
|
13
|
1,950
|
| Comparison Flags |
2,756
|
316
|
870K
870,896
|
| Symphony ALU |
6,137
|
141
|
865K
865,317
|
| Condition Match |
9
|
6
|
54
|
| Objective Beauty |
35
|
9
|
315
|
| Multiply |
744
|
225
|
167K
167,400
|
