ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.5K
14,551
|
74 |
25.0K
25,000
|
1.00 |
26.9B
26,919,350,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.5K
14,551
|
74 | 91 |
97.9M
97,986,434
|
| Mod 4 |
14.5K
14,551
|
74 | 5 |
5.38M
5,383,870
|
| Code Breaker |
14.5K
14,551
|
74 | 2,301 |
2.47B
2,477,656,974
|
| The Maze |
14.5K
14,551
|
74 | 2,064 |
2.22B
2,222,461,536
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
|
32
|
2,304
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
80
|
33
|
2,640
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
185
|
39
|
7,215
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
7
|
3
|
21
|
| 3 Bit Decoder |
62
|
7
|
434
|
| Little Box |
428
|
6
|
2,568
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
414
|
66
|
27.3K
27,324
|
| Conditions |
89
|
8
|
712
|
| Punchcard Programming |
14.5K
14,551
|
74
|
1.07M
1,076,774
|
| Assembly Programming |
14.5K
14,551
|
74
|
1.07M
1,076,774
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
47
|
8
|
376
|
| Unsigned Less |
81
|
34
|
2,754
|
| Signed Less |
83
|
35
|
2,905
|
| LSR |
190
|
8
|
1,520
|
| Count leading zeroes |
165
|
9
|
1,485
|
| ASR |
190
|
8
|
1,520
|
| One-hot Encoding |
190
|
8
|
1,520
|
| Comparison Flags |
918
|
140
|
128K
128,520
|
| Symphony ALU |
6,380
|
141
|
899K
899,580
|
| Condition Match |
8
|
5
|
40
|
| Objective Beauty |
28
|
8
|
224
|
| Divide |
2,607
|
545
|
1.42M
1,420,815
|
| Modulo |
2,704
|
544
|
1.47M
1,470,976
|
| Multiply |
632
|
97
|
61.3K
61,304
|
