ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.5K
14,530
|
74 |
25.0K
25,000
|
1.00 |
26.8B
26,880,500,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Nim | 8,906 | 155 | 7 |
9.66M
9,663,010
|
| Delicious order |
28.0K
28,026
|
156 | 2,934 |
12.8B
12,827,612,304
|
| Capitalize |
17.4K
17,402
|
156 | 796 |
2.16B
2,160,910,752
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| Full Adder |
13
|
6
|
78
|
| Bit Inverter |
4
|
3
|
12
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
104
169
|
48
11
|
4,992
1,859
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
112
177
|
49
12
|
5,488
2,124
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
217
282
|
55
18
|
11.9K
11,935
5,076
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
8
|
2
|
16
|
| 3 Bit Decoder |
37
|
4
|
148
|
| Little Box |
408
|
7
|
2,856
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Unsigned Less |
113
123
|
50
19
|
5,650
2,337
|
| Signed Less |
117
|
20
|
2,340
|
| ASR |
99
|
6
|
594
|
| One-hot Encoding |
99
|
6
|
594
|
| Comparison Flags |
1,258
|
80
|
100K
100,640
|
| Symphony ALU |
4,881
|
130
|
634K
634,530
|
| Objective Beauty |
36
|
10
|
360
|
