ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.8K
14,864
|
90 |
25.0K
25,000
|
1.00 |
33.4B
33,444,000,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
15.1K
15,127
|
121 | 12 |
21.9M
21,964,404
|
| Mod 4 |
14.8K
14,896
|
106 | 5 |
7.89M
7,894,880
|
| Code Breaker |
14.8K
14,896
|
106 | 1,278 |
2.01B
2,017,931,328
|
| The Maze |
15.1K
15,175
|
121 | 2,140 |
3.92B
3,929,414,500
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
5
|
4
|
20
|
| Half Adder |
5
|
3
|
15
|
| Full Adder |
11
|
4
|
44
|
| Bit Inverter |
4
|
3
|
12
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
|
32
|
2,816
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
16
|
6
|
96
|
| Signed Negator |
112
|
49
|
5,488
|
| Saving Bytes |
128
|
6
|
768
|
| Counter |
265
|
56
|
14.8K
14,840
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
588
|
7
|
4,116
|
| Arithmetic Logic Unit (ALU) 1 |
172
|
5
|
860
|
| Arithmetic Logic Unit (ALU) 2 |
524
|
98
|
51.3K
51,352
|
| Conditions |
56
|
7
|
392
|
| Punchcard Programming |
14.8K
14,896
|
106
|
1.57M
1,578,976
|
| Assembly Programming |
14.8K
14,896
|
106
|
1.57M
1,578,976
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
32
|
3
|
96
|
| Equality |
39
|
7
|
273
|
| Unsigned Less |
113
|
50
|
5,650
|
| Signed Less |
120
|
52
|
6,240
|
| LSR |
158
|
5
|
790
|
| Count leading zeroes |
159
|
11
|
1,749
|
| ASR |
158
|
5
|
790
|
| One hot encoding |
158
|
5
|
790
|
| Comparison Flags |
1,192
|
208
|
247K
247,936
|
| Symphony ALU |
6,214
6,952
|
209
130
|
1.29M
1,298,726
903K
903,760
|
| Condition Match |
11
|
5
|
55
|
| Objective beauty |
32
|
9
|
288
|
