ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.3K
14,345
|
70 |
25.0K
25,000
|
1.00 |
25.1B
25,103,750,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.5K
14,501
|
104 | 9 |
13.5M
13,572,936
|
| Mod 4 |
14.5K
14,501
|
104 | 1 |
1.50M
1,508,104
|
| Code Breaker |
14.6K
14,694
|
104 | 256 |
391M
391,213,056
|
| Nim |
1.82B
1,828,737,915
|
168 | 7 |
2.15T
2,150,595,788,040
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
6
|
3
|
18
|
| Full Adder |
10
11
|
5
4
|
50
44
|
| Bit Inverter |
5
|
3
|
15
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
|
32
|
2,816
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
36
|
9
|
324
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
193
|
53
|
10.2K
10,229
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
412
|
7
|
2,884
|
| Arithmetic Logic Unit (ALU) 1 |
116
|
4
|
464
|
| Arithmetic Logic Unit (ALU) 2 |
524
|
98
|
51.3K
51,352
|
| Conditions |
55
|
8
|
440
|
| Punchcard Programming |
14.5K
14,501
|
104
|
1.50M
1,508,104
|
| Assembly Programming |
14.5K
14,501
|
104
|
1.50M
1,508,104
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
40
|
3
|
120
|
| Equality |
47
|
8
|
376
|
| Unsigned Less |
96
|
33
|
3,168
|
| Signed Less |
132
|
35
|
4,620
|
| LSR |
156
|
5
|
780
|
| Count leading zeroes |
187
|
11
|
2,057
|
| ASR |
156
|
5
|
780
|
| One hot encoding |
156
|
5
|
780
|
| Comparison Flags |
1,202
|
140
|
168K
168,280
|
| Symphony ALU |
5,987
|
141
|
844K
844,167
|
| Condition Match |
10
|
6
|
60
|
| Objective beauty |
28
|
8
|
224
|
| Multiply |
968
|
337
|
326K
326,216
|
