COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
14.4K
14,460
|
101 | 9 |
13.1M
13,144,140
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
16
|
5
|
80
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
128
|
40
|
5,120
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
136
|
41
|
5,576
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
201
|
46
|
9,246
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
398
|
6
|
2,388
|
| Arithmetic Logic Unit (ALU) 1 |
131
|
7
|
917
|
| Arithmetic Logic Unit (ALU) 2 |
461
|
85
|
39.1K
39,185
|
| Conditions |
13
|
9
|
117
|
| Punchcard Programming |
14.4K
14,460
|
101
|
1.46M
1,460,460
|
| Assembly Programming |
14.4K
14,460
|
101
|
1.46M
1,460,460
|
