COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
16.1K
16,150
|
139 | 9 |
20.2M
20,203,650
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
5
|
3
|
15
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
6
|
4
|
24
|
| Half Adder |
6
|
3
|
18
|
| Full Adder |
18
|
7
|
126
|
| Bit inverter |
5
|
3
|
15
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
144
|
56
|
8,064
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
38
|
6
|
228
|
| Signed Negator |
152
|
57
|
8,664
|
| Saving Bytes |
304
|
6
|
1,824
|
| Counter |
482
|
64
|
30.8K
30,848
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
26
|
4
|
104
|
| Little Box |
1,306
|
7
|
9,142
|
| Arithmetic Logic Unit (ALU) 1 |
147
|
7
|
1,029
|
| Arithmetic Logic Unit (ALU) 2 |
472
|
116
|
54.7K
54,752
|
| Conditions |
54
|
10
|
540
|
| Punchcard Programming |
16.1K
16,150
|
139
|
2.24M
2,244,850
|
| Assembly Programming |
16.1K
16,150
|
139
|
2.24M
2,244,850
|
