COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
14.5K
14,570
|
105 | 9 |
13.7M
13,768,650
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
5
|
3
|
15
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
6
|
4
|
24
|
| Half Adder |
6
|
3
|
18
|
| Full Adder |
15
|
6
|
90
|
| Bit inverter |
5
|
3
|
15
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
120
|
48
|
5,760
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
128
|
49
|
6,272
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
193
|
54
|
10.4K
10,422
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
8
|
2
|
16
|
| 3 Bit Decoder |
37
|
4
|
148
|
| Little Box |
396
|
6
|
2,376
|
| Arithmetic Logic Unit (ALU) 1 |
116
|
4
|
464
|
| Arithmetic Logic Unit (ALU) 2 |
549
|
98
|
53.8K
53,802
|
| Conditions |
65
|
8
|
520
|
| Punchcard Programming |
14.5K
14,570
|
105
|
1.52M
1,529,850
|
| Assembly Programming |
14.5K
14,570
|
105
|
1.52M
1,529,850
|
