ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.5K
14,576
|
108 |
25.0K
25,000
|
1.00 |
39.3B
39,355,200,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.6K
14,658
|
126 | 9 |
16.6M
16,622,172
|
| Mod 4 |
14.6K
14,658
|
126 | 5 |
9.23M
9,234,540
|
| Code Breaker |
14.6K
14,658
|
126 | 1,282 |
2.36B
2,367,736,056
|
| The Maze |
14.6K
14,658
|
126 | 1,889 |
3.48B
3,488,809,212
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger AND Gate |
2
|
2
|
4
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
4
|
3
|
12
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
222
|
32
12
|
2,816
2,664
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
14
|
6
|
84
|
| Signed Negator |
38
|
9
|
342
|
| Saving Bytes |
112
|
6
|
672
|
| Counter |
173
|
56
|
9,688
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
46
|
6
|
276
|
| Little Box |
524
|
7
|
3,668
|
| Arithmetic Logic Unit (ALU) 1 |
131
|
7
|
917
|
| Arithmetic Logic Unit (ALU) 2 |
372
|
45
|
16.7K
16,740
|
| Conditions |
73
|
8
|
584
|
| Punchcard Programming |
14.6K
14,659
|
126
|
1.84M
1,847,034
|
| Assembly Programming |
14.6K
14,658
|
126
|
1.84M
1,846,908
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
32
|
3
|
96
|
| Equality |
33
|
7
|
231
|
| Unsigned Less |
51
|
14
|
714
|
| Signed Less |
88
|
16
|
1,408
|
| LSR |
99
|
6
|
594
|
| Count leading zeroes |
1,023
|
54
|
55.2K
55,242
|
| ASR |
99
|
6
|
594
|
| One-hot Encoding |
99
|
6
|
594
|
| Comparison Flags |
745
|
64
|
47.6K
47,680
|
| Symphony ALU |
4,630
5,166
|
171
91
|
791K
791,730
470K
470,106
|
| Condition Match |
11
|
5
|
55
|
| Objective Beauty |
30
|
8
|
240
|
| Divide |
3,850
|
819
|
3.15M
3,153,150
|
| Modulo |
3,850
|
771
|
2.96M
2,968,350
|
| Multiply |
1,521
|
357
|
542K
542,997
|
